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[VHDL-FPGA-Verilog] FPGA_SDRAM_PCI

Description: 一个基于FPGA的PCI数据采集程序，包括SDRAM控制，PCI9054时序控制，开发语言verilog，开发环境quartus-FPGA-based PCI data acquisition procedures, including SDRAM control, PCI9054 timing control, the development of language verilog, development environment quartusII
Platform: | Size: 2798592 | Author: 李国扬 | Hits:

[Other] yuqix_datum

Description: i2cinterface.v是我自己写的一段verilog代码，在接口为I2C接口的芯片设计中用到。送去流过片，仅作参考用。 debussy和modelsim协同仿真.txt 用于debussy和modelsim协同仿真时参考 RTL Coding and Optimization Guide for use with Design Compiler.pdf 数提讲座（1）.wmv 数提讲座（2）.wmv这两个视频和一篇文档对数字IC前端设计师的设计提高很有帮助，如果你觉得你到瓶颈状态了，想提高的话，强烈建议好好看看。 ADVANCED ASIC CHIP SYNTHESIS中文翻译资料.ppt这也是我极力推荐的，相信学习dc的人都知道原英文文档。这个ppt相当于翻译版，对dc和pt中文详细阐述。 基于DDR SDRAM控制时序分析的模型.pdf 全定制单元时序模型的建立.pdf 这两篇文档是用作建议时序模型的时候用作参考，是我花了小money买的哦。 数字IC设计全程实例.pdf 本文介绍了基于标准单元库的深亚微米数字集成电路的自动化设计流程。此流程从设计的系统行为级描述或RTL 级描述开始，依次通过系统行为级的功能验证，设计综合，综合后仿真，自动化布局布线，到最后的版图后仿真. -i2cinterface.v a section of my own writing verilog code for the I2C interface in the interface used in chip design. Sent to flow through the film, only for reference. debussy and modelsim co-simulation. txt for debussy and modelsim co-simulation reference RTL Coding and Optimization Guide for use with Design Compiler.pdf Mention the number of lectures (1). Wmv Mention the number of lectures (2). Wmv the two videos, and the document is useful for the digital front-end IC designers to improve the design capability. if you think you go to bottleneck, and want to improve, then it is strongly recommended a good look. ADVANCED ASIC CHIP SYNTHESIS Chinese translation of the information. Ppt that is what I strongly recommend, I believe that everyone learning dc knows its original English document. This ppt is equivalent to its translations.It elaborates the dc and pt in Chinese . DDR SDRAM control the timing analysis based on the model. Pdf
Platform: | Size: 20989952 | Author: 喻琪 | Hits:

[VHDL-FPGA-Verilog] sdram

Description: 程序说明: 本次实验控制开发板上面的SDRAM完成读写功能。 先向SDRAM里面写数据，然后再将数据读出来做比较，如果不匹配就通过LED变亮显示出来，如果一致，LED就不亮。 part1是使用Modelsim仿真的工程 part2是在开发斑上面验证的工程 目录说明: part1: part1_32是4m32SDRAM的仿真工程 part1_16是4m16SDRAM的仿真工程 \model文件夹里面是仿真模型 \rtl文件夹里面是源文件 \sim文件夹里面是仿真工程 \test_bench文件夹里面是测试文件 \wave文件夹里面是仿真波形 -Procedure Note: In this experiment, control development board to complete the above SDRAM read and write capabilities. SDRAM write data inside first and then read out the data to compare, if you do not match on the adoption of LED variable light display, if agreed, LED does not light. part1 is to use Modelsim simulation project part2 the top spot verification in the development of the project directory Description: part1: part1_32 is 4m32SDRAM simulation project part1_16 is 4m16SDRAM simulation works \ model folder, which is a simulation model \ rtl folder, which is the source file \ sim is a simulation project inside the folder \ test_bench folder which is a test file \ wave inside the folder is a simulation waveform
Platform: | Size: 779264 | Author: 军军 | Hits:

[VHDL-FPGA-Verilog] Sdram_Control_2Port

Description: 双端口SDRAM控制器，将SDRAM虚拟成两个端口，已经在ALTER DE2开发板的硬件上验证通过，采用Verilog HDL语言编写。-Dual-port SDRAM controller, SDRAM virtual into two ports, have ALTER DE2 development board hardware verification by using the Verilog HDL language.
Platform: | Size: 11264 | Author: | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 对SDRAM的介绍非常详细，里面有很多对SDRAM的程序控制模块的设计。-Very detailed presentation on the SDRAM, which has many of the SDRAM of the process control module.
Platform: | Size: 23523328 | Author: 魏大胜 | Hits:

[VHDL-FPGA-Verilog] DDR_SDRAM

Description: ddr sdram 的控制程序，lattice的，比较好用的，大家-ddr sdram control program, lattice, and relatively easy to use, and we look
Platform: | Size: 8483840 | Author: 熊熊 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 非常简单好用的SDRAM控制器，使初学者更加容易理解SDRAM的控制的操作，在Quatrtus环境中验证没问题。-SDRAM controller is very simple and easy to make it easier for beginners to understand the operation of the control of SDRAM, the environment in Quatrtus verify no problem.
Platform: | Size: 3365888 | Author: 马 召 | Hits:

[VHDL-FPGA-Verilog] SDRAM-verilog

Description: SDRAM读写控制的实现与Modelsim仿真-verilog-SDRAM read and write control to achieve with the Modelsim simulation-verilog
Platform: | Size: 2196480 | Author: sjdbjs | Hits:

[VHDL-FPGA-Verilog] SDRAM_TEST

Description: SDRAM控制代码，已经在开发板上测试通过。-SDRAM control code has been tested on the development board.
Platform: | Size: 17408 | Author: 吴平 | Hits:

[VHDL-FPGA-Verilog] sdram_hr_hw_4port

Description: FPGA控制SDRAM的源程序,SDRAM控制起来比较麻烦,时序复杂,本程序将其封装了一个模块,可以方便地调用.-FPGA to control the source of SDRAM, SDRAM control is too much trouble, the timing complexity of the procedure to package a module, you can easily call.
Platform: | Size: 2339840 | Author: 刘成岩 | Hits:

[VHDL-FPGA-Verilog] FPGA_DDR-SDRAM

Description: FPGA对SDRAM的控制，有部分源码，-FPGA SDRAM control, part of the source,...
Platform: | Size: 5399552 | Author: | Hits:

[VHDL-FPGA-Verilog] sdram

Description: 在ISE环境中，利用verilog语言编写的SDRAM的控制，已经通过功能仿真，其中PLL部分并没有加入，使用时可以自行加入PLL模块。-Verilog language in the ISE environment, the use of SDRAM control, through functional simulation, which the PLL part and did not join, can join the PLL blocks.
Platform: | Size: 18432 | Author: 蔡青青 | Hits:

[VHDL-FPGA-Verilog] SDRAM-control-SOPC

Description: sdram 控制器的sopc搭建 sdram 控制器的sopc搭建 -sdram controller the sopc build sdram controller sopc structures the
Platform: | Size: 3128320 | Author: lan yu | Hits:

[VHDL-FPGA-Verilog] sdram-control

Description: 基于FPGA的SDRAM读写控制程序，由VHDL语言编写-FPGA-based SDRAM read and write control program, by the VHDL language
Platform: | Size: 9216 | Author: lijiaxi | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 用XilinxSC1500控制SDRAM的一段VHDL代码。控制SDRAM每个时钟内输出地址所在的一个数据。-For some VHDL code with XilinxSC1500 Control SDRAM. Control SDRAM Each clock output address where a data.
Platform: | Size: 4096 | Author: xiaozhiji | Hits:

[VHDL-FPGA-Verilog] ddr-sdram-control

Description: ddr sdram控制器的设计与验证，提供了一种极为可靠且简易的控制器设计方案。-DDR SDRAM controller design and verification, providing an extremely reliable and simple controller design.
Platform: | Size: 769024 | Author: 毛洋 | Hits:

[VHDL-FPGA-Verilog] sdram

Description: SDRAM控制程序！verilog语言，已调通！-The SDRAM control procedures! Verilog language, has been transferred through!
Platform: | Size: 2607104 | Author: 刘晓青 | Hits:

[VHDL-FPGA-Verilog] sdram

Description: 本程序在Quartus ii 环境中开发设计了SDRAM的控制模块，功能齐全正确，能正确对SDRAM进行读写-This procedure in Quartus ii environment development and design of SDRAM control module, complete functions correctly, the SDRAM read and write correctly
Platform: | Size: 4752384 | Author: zhu | Hits:

[DSP program] SDRAM

Description: C6747开发板控制SDRAM程序，测试已经通过-C6747 development board 控制SDRAM程序，测试已经通过 SDRAM control program, the test has passed
Platform: | Size: 72704 | Author: mical | Hits:

[ComboBox] SDRAM-control

Description: 使用FPGA实现的SDRAM控制器访问代码，该代码的时序参数可调整-SDRAM controller FPGA implementation using the access code, the code is adjustable timing parameters
Platform: | Size: 27648 | Author: albert | Hits:
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